Electronic design automation (EDA) tools are computer-based tools that assist through automation of procedures that would otherwise be performed manually. Simulation of proposed design functionality and synthesis of integrated circuit logic and layout are two examples.
An integrated circuit may implement logic functions and other connectivity features that are a combination of various unit cells. Steps in completing the circuit design typically include placement of devices and features, routing, and electronic simulations.
The semiconductor industry is increasingly developing 3D integration chips utilizing stacked wafers based on through-silicon vias (TSVs). TSVs are conducting metal lines which extend out of the back side of a thinned-down die and enable the vertical interconnect to another die. EDA tools are a key part of developing such complex chips. TSVs are high-density, low-capacity interconnects compared to traditional wire bonds, and hence allow for many more interconnections between stacked dies, while operating at higher speeds and consuming less power. TSV-based 3D technologies enable the creation of a new generation of chips by opening up new architectural opportunities. Combined with their smaller form factor and lower overall manufacturing cost, 3D integration chips have many compelling benefits, and hence their technology is rapidly being developed. TSVs are an integral part of the 3D chip design and fabrication. Therefore, it is desirable to have improvements relating to the use of TSVs within 3D chip design and fabrication processes.